The company's next moves include building machines for advanced chip packaging and exploring ways to produce even larger silicon dies, shifting ASML from its narrow role ...

TSMC (Taiwan semiconductor) has a major multi-year plan to create rectangular substrate (510 millimeters by 515 millimeters) with over triple the usable area of current round wafers. The rectangular ...

Intel disclosed several chip packaging breakthroughs at the Electronic Components Technology Conference (ECTC), outlining the technical merits of multiple new chip packaging techniques. We spoke with ...

SEM (scanning electron microscope) images of test chip designed by Deca. Upper left show a molded multi-chip fan-out package with close-ups of the embedded die right and below The last time I wrote ...

Thanks to the AI tsunami, demand for AI chips from all sectors is continuing to surge. The Chip-on-Wafer-on-Substrate (CoWoS) architecture that dominates existing 2.5D and 3D packaging technologies is ...

ASML (ASML) plans to expand its chipmaking equipment portfolio with new products to capture more of the growing market for AI chips.

Shortages of a key chip packaging technology are constraining the supply of some processors, Taiwan Semiconductor Manufacturing Co. Ltd. chair Mark Liu has revealed. Liu made the remarks during a ...

As Intel works to regain its manufacturing edge over TSMC, the company is also expanding its advanced packaging capacity. Complex chips like AI accelerators use advanced packaging techniques instead ...

The field of electronics, particularly integrated circuit (IC) technology, has advanced rapidly in recent years. With the development of 5G/6G mobile technology, semiconductor devices are evolving to ...

With the consumer electronics market approaching saturation, panel manufacturers from Taiwan and China are seeking new avenues for growth. Firms like BOE and Innolux are shifting toward advanced ...